How to Install and Uninstall verilator Package on Kali Linux
Last updated: November 07,2024
1. Install "verilator" package
Please follow the step by step instructions below to install verilator on Kali Linux
$
sudo apt update
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$
sudo apt install
verilator
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2. Uninstall "verilator" package
Please follow the instructions below to uninstall verilator on Kali Linux:
$
sudo apt remove
verilator
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$
sudo apt autoclean && sudo apt autoremove
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3. Information about the verilator package on Kali Linux
Package: verilator
Version: 5.020-1
Installed-Size: 30276
Maintainer: Debian Electronics Team
Architecture: amd64
Depends: python3, perl:any, libc6 (>= 2.35), libjs-sphinxdoc (>= 7.2.2), sphinx-rtd-theme-common (>= 2.0.0+dfsg)
Recommends: libsystemc-dev
Suggests: gtkwave
Size: 6885556
SHA256: 6952a088f4ad1db7f036fc14f9ac17e9443eeec644b9a0c90f9f3215a1be32a3
SHA1: 44c3c9c76e25b9fca707eb5f8a01bee7ce5f45ae
MD5sum: 46a3a3df4e92c0e6005f8619d610095d
Description: fast free Verilog simulator
Verilator is the fastest free Verilog HDL simulator, and beats many commercial
simulators. It compiles synthesizable Verilog (not test-bench code!), plus
some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code.
It is designed for large projects where fast simulation performance is of
primary concern, and is especially well suited to generate executable models
of CPUs for embedded software design teams.
Description-md5:
Homepage: http://www.veripool.org/wiki/verilator
Built-Using: sphinx (= 7.2.6-3)
Tag: field::electronics, implemented-in::c++, implemented-in::perl,
interface::commandline, role::program, use::simulating
Section: electronics
Priority: optional
Filename: pool/main/v/verilator/verilator_5.020-1_amd64.deb
Version: 5.020-1
Installed-Size: 30276
Maintainer: Debian Electronics Team
Architecture: amd64
Depends: python3, perl:any, libc6 (>= 2.35), libjs-sphinxdoc (>= 7.2.2), sphinx-rtd-theme-common (>= 2.0.0+dfsg)
Recommends: libsystemc-dev
Suggests: gtkwave
Size: 6885556
SHA256: 6952a088f4ad1db7f036fc14f9ac17e9443eeec644b9a0c90f9f3215a1be32a3
SHA1: 44c3c9c76e25b9fca707eb5f8a01bee7ce5f45ae
MD5sum: 46a3a3df4e92c0e6005f8619d610095d
Description: fast free Verilog simulator
Verilator is the fastest free Verilog HDL simulator, and beats many commercial
simulators. It compiles synthesizable Verilog (not test-bench code!), plus
some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code.
It is designed for large projects where fast simulation performance is of
primary concern, and is especially well suited to generate executable models
of CPUs for embedded software design teams.
Description-md5:
Homepage: http://www.veripool.org/wiki/verilator
Built-Using: sphinx (= 7.2.6-3)
Tag: field::electronics, implemented-in::c++, implemented-in::perl,
interface::commandline, role::program, use::simulating
Section: electronics
Priority: optional
Filename: pool/main/v/verilator/verilator_5.020-1_amd64.deb